Altium filled vias

Via Stitching and Shielding - Altium Designer 17 Advanced - Module 11

There are many reasons a printed circuit board designer might want to have a via tented, plugged or filled. First, let's start with defining these terms since they can be frequently misused and misunderstood. This is the easiest and least costly process—actually there is no added cost for this process.

Simply remove the mask clearances from the vias you wish to have tented. Tenting a via simply means to cover the annular ring and via hole with solder mask. No special steps are taken to ensure the hole opening remains closed.

Tenting a via will sometimes result in the hole remaining covered but it isn't guaranteed. Smaller diameter vias 12mil diameter or less have the best chance of remaining closed.

The main purpose for tenting shouldn't be to close the opening of a hole but rather, cover the annular ring to prevent exposure to the elements and reduce accidental shorting or contact with the circuit. TIP: If you are tenting some of the vias in your design, always make a fabrication note either in a readme. Otherwise we may put the order on an engineering hold to verify your intention. With a mask plugged via, a.

Mask Filled or Non-Conductive Filled viaspecific measures are taken to ensure the via is plugged and sealed with mask and the annular ring is covered.

Non-Conductive Via Filling (NCVF) and Its Advantages

The concern is during assembly, solder will wick away from the intended pad and flow down the via creating poor or non-existent solder joints. TIP: If you require mask plugged vias, this must be specified in your fab print or readme. We will need to know the quantity, sizes and locations of the vias to be plugged so we can be sure all the required holes are plugged. This process is becoming more and more common as BGA packages are becoming tighter. This allows much simpler routing by soldering directly over the via.

Make sure this process is called out in your fab notes. The following steps are taken in this process.

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Conductive Fill: Generally, a conductive filled via will be used when heat or a large amount of current needs to be carried from one side of the board to another. These can be found under chips that will be giving off a lot of heat where overheating is a concern. The metallic nature of the fill will naturally wick heat away from the chip to the other side of the board in many ways like a radiator. The main drawback to conductive filled vias is the difference in CTE Coefficient of Thermal Expansion between the metallic fill and surrounding laminate.

Metal will heat and expand much more rapidly than the surrounding laminate and this may cause fractures between the pads and hole wall. Because of this, conductive filled vias are not recommended for Via In Pad processing where the purpose of the fill is the reinforce the stability of the copper pad that is plated over the hole.

Non-Conductive Fill: A common misconception is that a non-conductive fill will either not pass any or only a very weak electrical signal through the via. This is not true.

altium filled vias

The barrels of the vias will still be plated with copper the same as any other via on the board, the only difference is the empty air in barrel is replaced with the fill material. This is usually done to prevent solder or other contaminants from entering the via or provide structural support for a copper pad covering the open hole in the case of a Via In Pad.

Non-Conductive fill is another term for mask plugged vias. This is an older callout sometimes seen on legacy products. The original idea was to call for this as a way to have a copper conductive filled via. The problem with this process is that the holes must be extremely small to make this feasible since the copper used to to plate a via closed will also plate on all copper features on the board.

All vias and surface copper. This is 2.

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Tight space and trace designs are not possible with this amount of copper.Remember Me? Altium designer area fills, vias and plated edges. Altium designer area fills, vias and plated edges Hello, although I have checked the forum a few times I have never posted, but now I have a few issues that I hope you can help me with. I am working in a small RF board on Altium Designer. This is my first time using this software and there are a few things I don't know how to do or if they can be done or not.

The board is a two layer board where the bottom layer is ground and the top layer the signal layer. I have also covered the top layer empty areas with a ground plane, placing a polygon plane as it is done in this video: Altium Designer Tutorial: Copper planes and pours - YouTube Now I wonder how I can place in an automatic way evenly distributed vias to connect the top ground plane with the bottom ground plane The second question is, the vias I am placing have a cross shape as you can see in the image attached Finally I am trying to bring the signal lines to the edge of the board so that I can put this board on a larger board and connect both through these "plated edge vias".

What I try to do is to end a line at the edge of the board with a via, but having the via in the edge so that only half of it remains on the actual board.

altium filled vias

As you can see the last via is half way out, and therefore I will be able to put this board over another board and solder this edge to a pad. Is this done correctly or is there a better way to do what I pretend to do?? Thanks in advance, Marcos. Re: Altium designer area fills, vias and plated edges Hi Argam, Question 1 I don't think there's a way to place via's automatically. But you can place lot's of via's pretty quickly by copying and paste.

When you copy it gives you a pick point, you can use this pick point to choose your grid for the vias. So if you had a row of three vias shift click the last two in the row and use the first for your pick point.

If you then use the third via in the row as your place point you then have two extra vias at the correct spacing. Using this over and over you can get quite a large area covered pretty quickly.

Question 2 To change the connect style you need to create a new rule. Then change the Connect Style to Direct Connect this will connect all your via's to be directly connected. If you want to refine the rule further you can put in a second restriction in the bottom full query box.

The rules are pretty poweful once you get your head around them. Question 3 I don't know I've never done this maybe someone else can educate both of us. Hope this helps, Chris. Re: Altium designer area fills, vias and plated edges Thanks a lot for your help, both answers helped a lot.

Now I have another question.

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When I was working with a ground plane layer stack with two signal layers and a GND planethe autorouter, whenever there was a pad connected to ground, it used a via to connect it to it. Now, I just removed the ground plane from the board, having two signal layers, top and bottom, and I want to use the bottom layer as a GND plane, having the router to put vias whenever a pad is connected to GND.

But istead the autorouter tries to connect all the pads through lines on the top layer What I did before was to add a Ground plane to the stack and ignore the bottom signal layer. Is that a fine solution or is there a way to have the board with two layers, and have one act as if it was a ground plane?? Re: Altium designer area fills, vias and plated edges I'm not sure I don't use the Auto router at all I preffer to track all of the tracks by hand - you know what your getting then.

Re: Altium designer area fills, vias and plated edges argam I don't know if now it's usefull Re: Altium designer area fills, vias and plated edges For providing plated egdes you can make plated router details and adding same in fabrication details or best will be that you ask your fabricator, as he is the one who should understand what you want to do and if it is understanble to him than you can provide plated edges detail any which way.

Regarding last post I suggest you try making bottom layer as unroutable so that autorouter has only one layer to route and once auto routing is done you can do the same for ground signals by blocking top layer but fix the all prerouted part so that it is not modified.

Re: Altium designer area fills, vias and plated edges. Originally Posted by lucafus. Re: Altium designer area fills, vias and plated edges Better place some SMD pads at the corners and place the via on SMD pads slightly overlapping at an edge. So that it will be easier for you to solder both boards.Sometimes your feelings toward your manufacturer may resemble your feelings towards any ex-girlfriends.

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At that point, you may feel like replying with some choice words. Talking is still the answer, just not that kind. Having a discussion with your board manufacturer on the front end will reduce manufacturing defects and fabrication costs. Luckily, we can make up for our romantic shortcomings by designing excellent Printed Boards. Like flaws in that perfect person, defects in PCBs tend to show up over time. There are lots of things to check throughbut your top priorities should be via-in-pads, filled or capped vias, drilling methods, and surface mounted technology SMT pads.

If not properly addressed, VIPs can wick thermal solder paste away from components and cause bad connections or tombstoning. You can avoid those problems by plating over any VIPs.

Plated VIPs will need to be either filled or plugged, which is where your manufacturer comes in. Talk with them about their methods for filling or plugging, and then plating, any VIPs on your board.

Capped or Filled Vias - In a related note, you should also talk to your manufacturer about any general vias in PCB designs that need to be capped or filled.

Some people think they can slightly offset a via from a pad and it will be fine. Those people are wrong. You need to go over how your vias will be drilled with your manufacturer. Through vias are no problem, but drilling can cause some problems when it comes to blind and buried vias. Mechanical drilling, however, is not awesome. Peck drilling is where the drill moves in and out of a blind hole in order to remove drilled material.

The problem is, this method can cause material or air to become trapped inside the hole during plating. If pads are too close together, or if you accidentally forget some solder mask, solder paste will bridge pads. This is usually more a product of forgetfulness rather than bad design. You might miss this mistake, but your manufacturer will be looking for it.

Changing your mind after getting married will cost you an arm and a leg. Checking your designs with your manufacturer can save you a pretty penny.

altium filled vias

You should also run your design by your manufacturer to see if it will require expensive fabrication processes. Sometimes your manufacturer can suggest a different design that will be less expensive to fabricate, or a different process that can lower cost.

Remember how I was blathering on earlier about how blind vias in PCB designs can be laser drilled or peck drilled.

altium filled vias

Well, why would you ever peck drill when lasers are cooler and have less risk for defects? Some manufacturers are actually able to peck drill without causing defects or holes. If your manufacturer can do things like peck hole drilling correctly, they can save you a lot of money.

Sweet talk them and see what their capabilities are. Be sure to check individual as well, for example ctaa You may love your partner, but we both know that PCB design is your mistress. Clearly communicating with your manufacturer will help you address the flaws in your relationship with Printed Boards. Enlist their aid in avoiding defects in your vias and pads, and in saving money.To understand the reason behind their extra cost — and to appreciate their importance in modern, complex PCB designs — we need a basic review.

Below is a list of industry terms and their definitions, followed by an explanation of how blind, buried or filled vias are created in a fabrication shop. In the order they appear in the explanation below. Printed Circuit board. The pattern applied to the layers of a PCB. They are usually designated by a thickness in mils of the trace followed by the thickness of the isolating space between the traces. A thin piece of fiberglass laminate with copper cladding on both sides.

The core has fully cured epoxy and is intended to be buried within a multilayer PCB structure. It is available in a wide range of thicknesses and of copper foil weights.

A photosensitive material applied to the copper foil of the core or the outer layers of a PCB to allow the transfer photographically of the computer-generated CAD image in the Gerber file to the copper surface of the core or outer layer of the PCB.

The process in a multilayer PCB where the cores are sandwiched between layers of glass matt saturated with an uncured epoxy.

When exposed to temperatures above the melting point of the epoxy, the B-stage flows around the copper circuitry above and below removing any air, filling all geometry, and bonding the surfaces together as it cures. Prepreg is available in a wide variety of thickness due to the size and type of glass used to weave the matt.

The variety is further expanded by the types of epoxy resin saturating the matt. The resin varies depending upon the amount of flow that is desired when the epoxy is liquid. The copper foil used by a fabricator is sold to them by weight. The weight is based on a uniform film of copper spread over 1 ft2 of surface. If 1 ounce of copper is uniformly spread over the 1 ft2, the thickness of the resulting copper is 1. While the fabricator does purchase the copper foil by weight, 1 oz, 2 oz, etc.

The purchased foil is either eroded chemically and mechanically or increased by plating electro or electroless. This is a fabricator term for the double-sided, copper-clad structure that comes out of a laminating press once the core, prepreg, and copper foil have all been pressed together and the epoxy has cured. Sequential lamination refers to a repetition of the lamination process.

In sequential lamination, multiple intermediate bricks or a combination of intermediate bricks and double-sided cores are bonded together.

Defining the Via Types

This process can be repeated multiple times depending upon the process capability of the fabrication shop. The typical number of laminations is 3, but a few very specialized shops can perform 5—6. These are rare.

Multi-layer vs. Double-sided PCBs. The simplest MLB starts with a double-sided core. This thin, inner-layer material has copper on both sides. The copper surface is prepped with a photosensitive material that can be exposed by the application of UV light, and the light is then applied either through a photomask or with a raster scan laser called, Laser Direct Image. This is only a print-and-etch process. There are no holes in the core at this stage.

The etched inner layers are further processed chemically and then in a layup process sandwiched between prepreg glass matt that is saturated with a B-stage epoxyplaced in a heated laminating press and cured into a single piece.This copper layer not only makes the traces conductive but also connects each PCB layer between the holes drilled into the board.

The manufacturer can then leave the vias as-is and use the copper plating on its own to transfer signals. However, for added capacity, they can also fill the plated through holes with another conductive material.

To create a copper-filled via, the manufacturer fills the through holes with epoxy resin and copper. The extra materials add cost to board production, but copper-filled vias make a PCB more suitable for certain applications. Copper-filled vias also feature capabilities that other conductive fillings do not provide. This guide explains the primary purposes of copper-filled vias and how they can enhance your PCB design.

When filling a through hole with copper, the manufacturer must pay attention to creating an even layer of copper in the via without creating too thick an outer layer. Without using the proper techniques, they can create an overabundance of copper that increases PCB weight or adds too much copper to the traces.

This results in a failure to meet specifications, defects or increased costs. With via holes becoming smaller than ever, observing these requirements becomes vital to meeting tight design specs. Classic copper via filling methods involve using pure copper to fill the hole. However, this approach often results in the formation of voids, in which contaminants become trapped in the middle of the copper.

PCBs featuring copper-filled vias have the following advantages over boards that only have copper-plated vias:. While PCBs that feature copper-filled vias have added capacity, they also cost more to produce than PCBs with plated through holes.

Some situations require the added reliability associated with copper-filled vias. However, a PCB can also serve certain applications with a via that has only the copper plating applied alongside the copper traces.

In low-stress applications, a properly manufactured PCB with plated through holes can function without defects. The high-power integrated circuits that run these types of PCBs use currents that a copper-filled via can withstand, but not a plated through hole. While a silver conductive epoxy resin may seem like the logical choice for filling vias because of its higher value, copper works more effectively. Compared to silver epoxy, copper has:. Their higher levels of thermal and electrical conductivity allow them to redirect excess heat more effectively.Search articles:.

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Blind, Buried and/or Filled Vias

How to Export Gerber from KiCad. PCB Glossary. Trace Width Calculator.Parent page: PCB Objects. A via that spans and connects from the top layer red to the bottom layer blueand also connects to one internal power plane green. A via is a primitive design object. It is used to form a vertical electrical connection between two or more electrical layers of a PCB. The barrel-shaped body of the via is formed when the board is drilled and through-plated during fabrication. In the X and Y planes, vias are circular, like round pads.

After launching the command, the cursor will change to a crosshair and you will enter via placement mode:. A via will adopt a net name if it is placed over an object that is already connected to a net.

Typically vias are not placed manually; they are placed automatically as part of the interactive routing process. When a via is placed in free space, it is not possible for the software to apply a routing style design rule during placement. In this situation the default via will be placed. If a via is being moved with the routing to create more routing or component space, it can be more efficient to re-route than move routing.

The software includes a feature called Loop Removal. With this feature enabled, you route along a new path starting and ending somewhere along the original routingas soon as you right-click to exit the interactive routing mode the old routing loop is removed, including any redundant vias. This affects the panel only and does not change the actual measurement unit employed for the board. Vias are a key element of the routing.

This section provides valuable information on working with vias.

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The default is for a via to span from the Top Layer through to the Bottom Layer; this is known as a thru-hole via. In a multi-layer board, a via can also span other layers.

The possible layers that a via can span depends on the fabrication technology used to fabricate the board. The traditional approach to manufacture a multi-layer board is to make it as a set of thin double-sided boards, which are then sandwiched together under heat and pressure to form a multi-layer board.

The image below shows a six layer board, as shown by the layer names on the left side of the image. These double-sided boards can have via sites drilled, if required, forming what are known as blind vias via number 1 when the via spans from a surface layer to an inner layer; and buried viaswhen a via spans from one internal layer to another internal layer via number 2. After the layers are pressed together into a single multi-layer board, thru-hole vias are drilled via number 3.

The three types of vias that can be created: blind 1buried 2 and thru-hole. Another type of multi-layer board fabrication technology is called Build-up technology, where layers are added one after the other, often over a double-sided or traditional multi-layer board. When this technology is used, vias can be drilled with a laser after each layer is added during the build up process, resulting in a large number of possible layer-pairs that can be spanned.

The layer-pairs used for each via are defined by the Start Layer and End Layer settings for the via. Because the hole is laser drilled, it has a cone shape. The expansion is measured from the outer edge of the copper.


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